A Coprocessor for the Fast Tracker Simulation - Archive ouverte HAL
Communication Dans Un Congrès Année : 2017

A Coprocessor for the Fast Tracker Simulation

Christos Gentsos
  • Fonction : Auteur
Guido Volpi
  • Fonction : Auteur
Stamatios Gkaitatzis
  • Fonction : Auteur
Paola Giannetti
  • Fonction : Auteur
Saverio Citraro
  • Fonction : Auteur
Kostas Kordas
  • Fonction : Auteur
Spiridon Nikolaidis
  • Fonction : Auteur

Résumé

The Fast Tracker (FTK) executes real-time tracking for online event selection in the ATLAS experiment. Data processing speed is achieved by exploiting pipelining and parallel processing. Track reconstruction is executed in two stages. The first stage, implemented on custom application-specific integrated circuit (ASICs) called associative memory (AM) chips, performs pattern matching (PM) to identify track candidates in low resolution. The second stage, implemented on field programmable gate arrays (FPGAs), builds on the PM results, performing track fitting in full resolution. The use of such a parallelized architecture for real-time event selection opens up a new, huge computing problem related to the analysis of the acquired samples. Millions of events have to be simulated to determine the efficiency and the properties of the reconstructed tracks with a small statistical error. The AM chip emulation is a computationally intensive task when implemented in software running on commercial resources. This paper proposes the use of a hardware coprocessor to solve this problem efficiently. We report on the implementation and performance of all the functions requiring massive computing power in a modern, compact embedded system for track reconstruction. That system is the miniaturization of the complex FTK processing unit, which is also well suited for powering applications outside the realm of high energy physics.
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Dates et versions

hal-01645836 , version 1 (23-11-2017)

Identifiants

Citer

Christos Gentsos, Guido Volpi, Stamatios Gkaitatzis, Paola Giannetti, Saverio Citraro, et al.. A Coprocessor for the Fast Tracker Simulation. 20th IEEE-NPSS Real Time Conference, Jun 2016, Padua, Italy. pp.1255-1262, ⟨10.1109/TNS.2017.2688586⟩. ⟨hal-01645836⟩
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