A Layout-Educated Analog Design Flow - Archive ouverte HAL
Communication Dans Un Congrès Année : 2004

A Layout-Educated Analog Design Flow

Résumé

In this paper, we present a new flow for analog design automation. It is an electrical and layout co-design flow which is based on the precise knowledge of the process electrical models and layout. This flow is as fast as a layout-aware flow since the layout informations aren’t given by an external extractor, but are measured while generating the layout. But it is also as accurate as a layout-inclusive flow seeing that it goes until the layout generation. It is so a layout-educated flow which, by a strong separation from the target process, allows the technology migration for commonly used designs. All the expertise of the proposed flow is contained in the device generators, which are the leaf cells of the flow hierarchy
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Dates et versions

hal-01521124 , version 1 (11-05-2017)

Identifiants

  • HAL Id : hal-01521124 , version 1

Citer

Vincent Bourguet, Laurent de Lamarre, Marie-Minerve Rosset-Louërat. A Layout-Educated Analog Design Flow. MWSCAS 2004 - 47th Midwest Symposium on Circuits and Systems, Jul 2004, Hiroshima, Japan. pp.432-488. ⟨hal-01521124⟩
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