Throughput Evaluation of DSP Applications based on Hierarchical Dataflow Models - Archive ouverte HAL Access content directly
Conference Papers Year : 2017

Throughput Evaluation of DSP Applications based on Hierarchical Dataflow Models

Abstract

Synchronous Dataflow (SDF) is the most commonly used dataflow Model of Computation (MoC) for the specification of Digital Signal Processing (DSP) systems. The Interface-Based SDF (IBSDF) model extends the semantics of the SDF model by introducing a graph composition mechanism based on hierarchical interfaces. Computing the throughput of an application is essential when designing DSP systems. This article introduces and assesses new methods to compute the throughput of DSP applications specified with IBSDF graphs. First, a basic method inspired from the state-of-the-art techniques that relies on a transformation of the IBSDF graph to an equivalent non-hierarchical graph of potentially exponential size. Second, a new technique that takes advantage of the hierarchy semantics of the IBSDF MoC to speed-up the throughput evaluation without any conversion. The proposed technique makes it possible to compute the throughput of large IBSDF graphs in a few milliseconds, where the basic method fails to produce a result.
Fichier principal
Vignette du fichier
ISCAS2017 _published.pdf (296.13 Ko) Télécharger le fichier
Origin : Files produced by the author(s)
Loading...

Dates and versions

hal-01514641 , version 1 (26-04-2017)

Identifiers

Cite

Hamza Deroui, Karol Desnos, Jean-François Nezan, Alix Munier-Kordon. Throughput Evaluation of DSP Applications based on Hierarchical Dataflow Models. International Symposium on Circuits and Systems (ISCAS), May 2017, Baltimore, United States. ⟨10.1109/ISCAS.2017.8050774⟩. ⟨hal-01514641⟩
575 View
314 Download

Altmetric

Share

Gmail Facebook X LinkedIn More