We have developed a numerical simulation methodology to analyze the impact of both device architecture and transport properties on static circuit performance. Firstly, to simulate ballistic transport, we have enhanced the pioneering approach of quasi-ballistic mobility proposed by Rhew and Lundstrom and introduced it into a technology computer aided design (TCAD) simulator. Secondly, we have introduced the remote Coulomb scattering (RCS) limited mobility into the effective mobility and calibrated our model using experimental mobility data. We have used our approach to simulate two ultimate architectures: fully-depleted (FD) silicon-on-insulator (SOI) metal-oxide-semiconductor field-effect transistor (MOSFET) (with either thin or thick buried oxide) and nanowire MOSFET. Finally, we have analyzed the impact of both transport properties and electrostatic control on the noise margin (NM) of complementary metal-oxide-semiconductor (CMOS) inverter. (C) 2011 The Japan Society of Applied Physics