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Article Dans Une Revue Microelectronics Journal Année : 2017

A compact implementation of a negative switched-capacitor voltage regulator dedicated to body-biasing of CMOS circuits

Résumé

A fully integrated negative voltage regulator dedicated to body-biased circuits in FDSOI is proposed and validated through simulation. The regulator comprises an original negative switched-capacitor converter with a frequency modulation control loop. It can be digitally programmed by step of 100 mV in 100 μs time-scale from 100 mV to 1.3 V of negative voltage. The maximum overall power consumption is 20 μA to drive View the MathML source of digital load.
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Dates et versions

hal-01421345 , version 1 (22-12-2016)

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Thomas Souvignet, Bruno Allard, Alexandre Mas. A compact implementation of a negative switched-capacitor voltage regulator dedicated to body-biasing of CMOS circuits. Microelectronics Journal, 2017, 60, pp.13 - 20. ⟨10.1016/j.mejo.2016.11.016⟩. ⟨hal-01421345⟩
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