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Communication Dans Un Congrès Année : 2000

Framework for system design, validation and fast prototyping of multiprocessor system-on-chip: applied to telecommunication systems

Résumé

This paper presents a system-level design approach which applies to an embedded telecommunication applications. The presented approach takes into account multilanguages functional specification, multi-level validation, both algorithm and multiprocessor architecture explorations, refinement, software and hardware design, and final prototyping generation. Our design flow combines a different technologies such as MatlabTM, SDL and codesign tool, as well as other related tools, to support all development cycle. A Case study on real world communication device application demonstrates the effectiveness of our approach.
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Dates et versions

hal-01384189 , version 1 (19-10-2016)

Licence

Paternité - Pas d'utilisation commerciale

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  • HAL Id : hal-01384189 , version 1

Citer

Nacer-Eddine Zergainoh, Amer Baghdadi, L. Tambour, D. Lyonnard, L. Gauthier, et al.. Framework for system design, validation and fast prototyping of multiprocessor system-on-chip: applied to telecommunication systems. International Workshop on Distributed and Parallel Embedded Systems (DIPES'00), Jan 2000, Paderborn, Allemagne. ⟨hal-01384189⟩

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