This paper presents a very promising architecture that is suited for a Full Software Radio (FSR) transmitter. The core system is made of two blocks: one generates a set of square sequences and is named Walsh Sequences Synthesizer, while the other, the Walsh digital-to-analog converter (DAC), performs the conversion, by summing and dynamically weighing the sequences with a reduced set of coefficients. The resulting piecewise linear signal, corresponding to the Walsh series of the wanted signal, is summed as current steps into a differential load. System and circuit simulations have been carried out and demonstrate that the generation of concurrent modulated signal is possible with a rejection of 40 dBr over 10GHz bandwidth. With only moderate hardware complexity, it provides promising performances to pave the way to the implementation of a multi-carrier, multistandard radio frequency transmitter.