A balanced logic routing block for Factorial-DLL based frequency generation - Archive ouverte HAL
Communication Dans Un Congrès Année : 2016

A balanced logic routing block for Factorial-DLL based frequency generation

Résumé

This paper presents the design of a balanced logic block that can act as either a delay line or a ring oscillator, with the addition of a voltage controlled element to pave the way for flexibility and tunability. This block is the key element of a Factorial Delay Locked Loop (F-DLL), and its balanced nature allows to significantly reduce the reference frequency-related spurious that are generated within the spectrum of a frequency generation unit when the latter is based on DLL. Once compared to the classical implementations of F-DLL logic block a Boolean routing is substituted to the switches. This allows a constant loading to the delay elements regardless the selected functionality of the logic block, namely delay line or ring oscillator. Doing so, the classical discrepancy that occurs in propagation delays in the two different modes is cancelled or at least minimized. The reference frequency-related error is therefore repealed.
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Dates et versions

hal-01377962 , version 1 (08-10-2016)

Identifiants

  • HAL Id : hal-01377962 , version 1

Citer

Francois Rivet, Yann Deval. A balanced logic routing block for Factorial-DLL based frequency generation. 29th Symposium On Integrated Circuits And Systems Design (SBCCI), Aug 2016, Belo Horizonte, Brazil. ⟨hal-01377962⟩
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