This paper presents the power consumption analysis of two different routing architectures for mesh based FPGAs. The first architecture uses bidirectional Switch Box (SB) implemented using back-to-back tri-state drivers. The second one uses bidirectional SB implemented using tri-states and multiplexers. This paper highlights and experimentally demonstrates the benefit that can be reached by using multiplexers instead of back-to-back tri-state. In fact, total power consumption is reduced by around 23.5% with 0,13 μm technology which provides transistor with low leakage power and realizes 47% power savings with 0,18 μm technology. This benefit is due to a reduction in term of leakage power consumed by routing resource.