Traditional memories use an address to index the stored data. Associative memories rely on a different principle: a part of previously stored data is used to retrieve the remaining part. They are widely used, for instance, in network routers for packet forwarding. A classical way to implement such memories is Content-Addressable Memory (CAM). Since its operation is fully parallel, the response is obtained in a single clock cycle. However, this comes at the cost of energy consumption. This work proposes to use a recent type of neural networks as a novel way to implement associative memories. Thanks to an efficient retrieval algorithm guided by the information being searched, they are a good candidate for low-power associative memory. Compared to CAM-based system, analog implementation of 12kb neuro- inspired memory designed for 65nm CMOS technology, offers 48% energy savings.