A 65-nm CMOS DAC Based on a Differentiating Arbitrary Waveform Generator Architecture for 5G Handset Transmitter - Archive ouverte HAL
Article Dans Une Revue IEEE Transactions on Circuits and Systems II: Express Briefs Année : 2016

A 65-nm CMOS DAC Based on a Differentiating Arbitrary Waveform Generator Architecture for 5G Handset Transmitter

Résumé

An arbitrary waveform generator (AWG) architecture suited for 5G transmission is presented. The digital-to-analog (DA) conversion principle is discussed, underlining its theoretical features toward radio frequency (RF) applications. The signal generation is based on a piecewise linear approximation, resulting from the use of a differential digital coding associated with a custom digital-to-analog converter (DAC), named here the Riemann Pump. The intrinsic performances of this architecture in terms of quantization noise make the Riemann Pump an efficient DAC for multi-carrier applications. Simulations have been carried out on the considered architecture, with a configuration that covers more than 3 GHz bandwidth with a slight oversampling ratio (OSR) and several input bits. Carrier aggregation capabilities are shown with a 5G handset transmission scheme of 10 synchronized 64-QAM modulated signals between 1.8 GHz and 3.6 GHz. This disruptive system exhibits promising performances as for the realization of a 5G handset transmitter with moderate hardware complexity and low power consumption.

Domaines

Electronique
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Dates et versions

hal-01240272 , version 1 (08-12-2015)

Identifiants

Citer

Yoan Veyrac, Francois Rivet, Yann Deval, Dominique Dallet, Patrick Garrec, et al.. A 65-nm CMOS DAC Based on a Differentiating Arbitrary Waveform Generator Architecture for 5G Handset Transmitter. IEEE Transactions on Circuits and Systems II: Express Briefs, 2016, 63 (1), pp.104-108. ⟨10.1109/TCSII.2015.2504947⟩. ⟨hal-01240272⟩
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