Challenges for the Parallelization of Loosely Timed SystemC Programs - Archive ouverte HAL Access content directly
Conference Papers Year : 2015

Challenges for the Parallelization of Loosely Timed SystemC Programs

Denis Becker
  • Function : Author
  • PersonId : 971595
Matthieu Moy
Jérôme Cornet
  • Function : Author
  • PersonId : 849247

Abstract

SystemC/TLM models are commonly used in the industry to provide an early SoC simulation environment. The open source implementation of the SystemC simulator is sequential. The standard doesn't impose sequential executions, but makes this choice the easiest by imposing coroutine semantics. With the increasing size and complexity of models, and the multiplication of computation cores on recent machines, the parallelization of SystemC simulations is a major research concern. There have been several proposals for SystemC parallelization, but most of them are limited to cycle-accurate models. In this paper we give an overview of the practices in one industrial context. We explain why loosely timed models are the only viable option in this context. We also show that unfortunately, most of the existing approaches for SystemC parallelization can fundamentally not apply to these models. We support this claim with a set of measurements performed on a platform used in production at STMicroelectronics. This paper both surveys existing techniques and identifies unsolved challenges in the parallelization of SystemC/TLM models.
Fichier principal
Vignette du fichier
paper.pdf (174 Ko) Télécharger le fichier
Origin Files produced by the author(s)
Loading...

Dates and versions

hal-01214891 , version 1 (13-10-2015)

Identifiers

  • HAL Id : hal-01214891 , version 1

Cite

Denis Becker, Matthieu Moy, Jérôme Cornet. Challenges for the Parallelization of Loosely Timed SystemC Programs. IEEE International Symposium on Rapid System Prototyping, Oct 2015, Amsterdam, Netherlands. ⟨hal-01214891⟩

Relations

357 View
237 Download

Share

Gmail Mastodon Facebook X LinkedIn More