A Simplified Circuit to Model RC Interconnect
Résumé
In very deep submicron technologies, the parasitic capacitor and resistance can have a significant impact on
propagation delay and functional failure. Several methods consist in evaluating the output delay or giving an approximation of the output signal. These methods are really simple and are easily used in timing analysis. However, they are unusable in functional failure analysis such as crosstalk noise analysis.
In this paper we propose to model rc-circuits with a simplified circuit composed by a resistor, a capacitor and several current sources. The simplified circuit can easily be integrated in a crosstalk noise evaluation tool. Its accuracy is demonstrated on several large rc-circuits.