Mixed architectures which contain both programmable devices and reconfigurable ones provide a powerful solution to meet the computational requirement of newest digital signal processing applications. But they are so complex that their design is slow and expensive. This problem can be solved by the use of rapid prototyping methodologies and associated CAD tools. In a previous paper we developed and presented such a tool named SynDEx-Mixte which is devoted to Hardware/Software partitioning, optimization and code generation. In this paper, we focus on SynDEx-Mixte automatic generation of hardware communication IP between programmable and configurable parts.