Formalization of fUML: An Application to Process Verification - Archive ouverte HAL Access content directly
Conference Papers Year : 2014

Formalization of fUML: An Application to Process Verification


Much research work has been done on formalizing UML Ac-tivity Diagrams for process modeling to verify different kinds of sound-ness properties (deadlock, unreachable activities and so on) on process models. However, these works focus mainly on the control-flow aspects of the process and have done some assumptions on the precise execution semantics defined in natural language in the UML specification. In this paper, we define a first-order logic formalization of fUML (Foundational Subset of Executable UML), the official and precise operational seman-tics of UML, in order to apply model checking techniques and therefore verify the correctness of fUML-based process models. Our formalization covers the control-flow, data-flow, resources, and timing dimensions of processes in a unified way. A working implementation based on the Al-loy language has been developed. The implementation showed us that many kinds of behavioral properties not commonly supported by other approaches and implying multiple dimensions of the process can be effi-ciently checked.
Fichier principal
Vignette du fichier
caise14-CM-v3.pdf (630.86 Ko) Télécharger le fichier
Origin : Files produced by the author(s)

Dates and versions

hal-01088190 , version 1 (27-11-2014)



Yoann Laurent, Reda Bendraou, Souheib Baarir, Marie-Pierre Gervais. Formalization of fUML: An Application to Process Verification. CAiSE 2014 - The 26th International Conference on Advanced Information Systems Engineering, Jun 2014, Thessaloniki, Greece. pp.347-363, ⟨10.1007/978-3-319-07881-6_24⟩. ⟨hal-01088190⟩
132 View
284 Download



Gmail Facebook Twitter LinkedIn More