Investigation of the degradation mechanisms of InP/InGaAs DHBT under bias stress conditions to achieve electrical aging model for circuit design - Archive ouverte HAL
Communication Dans Un Congrès Année : 2011

Investigation of the degradation mechanisms of InP/InGaAs DHBT under bias stress conditions to achieve electrical aging model for circuit design

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Micro et nanotechnologies/Microélectronique

sebastien fregonese  : Connectez-vous pour contacter le contributeur

https://hal.science/hal-01002192

Soumis le : jeudi 5 juin 2014-17:16:25

Dernière modification le : mercredi 15 novembre 2023-13:14:27

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hal-01002192 , version 1 (05-06-2014)

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  • HAL Id : hal-01002192 , version 1

Citer

S. Ghosh, B. Grandchamp, G. A. Koné, F. Marc, C. Maneux, et al.. Investigation of the degradation mechanisms of InP/InGaAs DHBT under bias stress conditions to achieve electrical aging model for circuit design. 22th European Symposium on the RELIABILITY OF ELECTRON DEVICES, FAILURE PHYSICS AND ANALYSIS, Oct 2011, bordeaux, France. pp.1-4. ⟨hal-01002192⟩

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