Efficient Multilevel Interconnect Topology for Cluster-based Mesh FPGA Architecture
Résumé
This paper presents an improved cluster-based Mesh architecture. This architecture has a depopulated intracluster interconnect, and presents a new hierarchical topology for the switch box which unifies a downward and an upward unidirectional networks. Experimental results of 20 MCNC benchmarks show that density is improved and interconnect area requirement is reduced by 42% compared to the cluster-based VPR architecture.
Domaines
Electronique| Origine | Fichiers produits par l'(les) auteur(s) |
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