Data Mining MPSoC Simulation Traces to Identify Concurrent Memory Access Patterns - Archive ouverte HAL Accéder directement au contenu
Communication Dans Un Congrès Année : 2013

Data Mining MPSoC Simulation Traces to Identify Concurrent Memory Access Patterns

Résumé

Due to a growing need for flexibility, massively parallel Multiprocessor SoC (MPSoC) architectures are currently being developed. This leads to the need for parallel software, but poses the problem of the efficient deployment of the software on these architectures. To address this problem, the execution of the parallel program with software traces enabled on the platform and the visualization of these traces to detect irregular timing behavior is the rule. This is error prone as it relies on software logs and human analysis, and requires an existing platform. To overcome these issues and automate the process, we propose the conjoint use of a virtual platform logging at hardware level the memory accesses and of a data-mining approach to automatically report unexpected instructions timings, and the context of occurrence of these instructions. We demonstrate the approach on a multiprocessor platform running a video decoding application.

Mots clés

Fichier non déposé

Dates et versions

hal-00817027 , version 1 (23-04-2013)

Identifiants

  • HAL Id : hal-00817027 , version 1

Citer

Sofiane Lagraa, Alexandre Termier, Frédéric Pétrot. Data Mining MPSoC Simulation Traces to Identify Concurrent Memory Access Patterns. DATE 2013 - Conference on Design, Automation and Test in Europe, Mar 2013, Grenoble, France. pp.755-760. ⟨hal-00817027⟩
109 Consultations
0 Téléchargements

Partager

Gmail Facebook X LinkedIn More