FPGA Implementation of a General Space Vector Approach on a 6-Leg Voltage Source Inverter - Archive ouverte HAL
Communication Dans Un Congrès Année : 2011

FPGA Implementation of a General Space Vector Approach on a 6-Leg Voltage Source Inverter

Résumé

A general algorithm of a Space Vector approach is implemented on a 6-leg VSI controlling a PM synchronous machine with three independent phases. In this last case, the necessity of controlling the zero-sequence current motivates the choice of a special family of vectors, different of this one used in Pulse Width Modulation (PWM) intersective strategy and in common Space Vector PWM (SVPWM). To preserve the parallelism of the algorithm and fulfill the execution time constraints, the implementation is made on a Field Programmable Gate Array (FPGA). Comparisons with more classical 2-level and 3-level PWM are provided.
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Dates et versions

hal-00785651 , version 1 (06-02-2013)

Identifiants

Citer

Paul Sandulescu, Lahoucine Idkhajine, Frédéric Colas, Xavier Kestelyn, Eric Semail, et al.. FPGA Implementation of a General Space Vector Approach on a 6-Leg Voltage Source Inverter. IECON 2011 - 37th Annual Conference on IEEE Industrial Electronics Society, Nov 2011, Melbourne, Australia. pp.5, ⟨10.1109/IECON.2011.6119872⟩. ⟨hal-00785651⟩
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