The step-down switch-mode DC/DC power supply is commonly used in power management of integrated circuits such as high performances processors and high speed memories. Sliding-mode-control appears to be one of the best way to control step-down switch-mode converter due to stringent transient performances required by next generation processor cores used in Smart-phones or Tablets. However sliding-mode's free-running frequency has to be controlled due to electromagnetic compatibility issues. This paper presents a time-delay based frequency control analysis of a sliding-mode controlled buck converter. Lower and upper bounds of the synchronization domain are discussed and a frequency loop stability analysis is presented. The original contribution is the circuit implementing a synchronization solution. Transistor level simulations corroborate theoretical results. An integrated test-chip is under fabrication using CMOS 130nm process by ST.