In order to anticipate the further demands of miniaturization and integration of ldquoSystem-in-Packagerdquo, the technology of 3D through-silicon-vias (TSVs) has been developed at NXP Semiconductors. The sputtering and the electroplating have been chosen for realize respectively a copper seed layer and a thick copper deposition inside 75 mum wide and hundreds micrometer deep microvias. The microvias, for an aspect-ratio (AR) up to 2.3, can be successfully covered by a sputtered 3 mum thick copper layer. To achieve a thick microvia filling, the pulsed current is preferred and a perpendicular electrolyte flow is critical. With an 11 mum thick patterned photoresist mask on the field, the 75 mum diameter and 180 mum deep microvias can be more-than-the-half filled using the ldquosuperfillingrdquo recipe when the field depositing layer reaches the mask level. Such partially filled microvias exhibit excellent electrical resistances within the range of 4 mOmega.