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Communication Dans Un Congrès Année : 2001

Design simulation of decimation filter for sigma delta converters

Sonia Boujelben
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Chiheb Rebai
  • Fonction : Auteur
  • PersonId : 843585

Résumé

The purpose of this paper is to present several filter topologies used for decimation of sigma delta modulated digital signals in order to choose the optimised filter architecture with regards to an efficient implementation. The filter is suited for data conversion and measurement applications. A second order 1-bit sigma delta modulator will be considered as the front-end A/D converter. The subsequent digital filter reduces the sampling rate by a factor of 64 and must guarantee a stop band attenuation of 80 dB
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Dates et versions

hal-00567951 , version 1 (22-02-2011)

Identifiants

  • HAL Id : hal-00567951 , version 1

Citer

Sonia Boujelben, Chiheb Rebai, Dominique Dallet, Philippe Marchegay. Design simulation of decimation filter for sigma delta converters. IWADC 2001, Sep 2001, Lisbone, Portugal. pp.111-115. ⟨hal-00567951⟩
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