Analysis of the dynamic avalanche of punch through insulated gate bipolar transistor (PT-IGBT) - Archive ouverte HAL
Article Dans Une Revue Solid-State Electronics Année : 2009

Analysis of the dynamic avalanche of punch through insulated gate bipolar transistor (PT-IGBT)

Dominique Planson
Hervé Morel
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Dominique Bergogne
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Résumé

In the paper proposed here, we are studying the dynamic avalanche from experimental results first, dynamic avalanche is identified on a punch through insulated gate bipolar transistor (PT-IGBT) module 1200V-300 A from Mitsubishi. Secondly, the phenomenon is analysed thanks to simple solid state devices equations. Numerical simulations are used to confirm experimental results. Simulation results allows us locating the active area of the dynamic avalanche during turn-off under over-current conditions. A PT-IGBT cell is described with MEDICI (TM). a finite element simulator. A mixed-mode simulation is performed thanks to MEDICI (TM) and SPICE (TM). The circuit simulated here is a buck topology with an inductive load. Finally, a thermal analysis is performed to estimate temperature increase due to dynamic avalanche. (C) 2009 Elsevier Ltd. All rights reserved.

Dates et versions

hal-00476201 , version 1 (23-04-2010)

Identifiants

Citer

Pierre Lefranc, Dominique Planson, Hervé Morel, Dominique Bergogne. Analysis of the dynamic avalanche of punch through insulated gate bipolar transistor (PT-IGBT). Solid-State Electronics, 2009, 53 (9), pp.944-954. ⟨10.1016/j.sse.2009.06.009⟩. ⟨hal-00476201⟩
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