Updates on the Potential of Clock-Less Logics to Strengthen Cryptographic Circuits against Side-Channel Attacks - Archive ouverte HAL
Communication Dans Un Congrès Année : 2009

Updates on the Potential of Clock-Less Logics to Strengthen Cryptographic Circuits against Side-Channel Attacks

Résumé

Cryptographic circuits are subject to sneak attacks that target directly their implementation. So-called side-channel attacks consists in observing dynamic circuit emanations in order to derive information about the secrets itconceals. Clock-less logic styles natively make side-channel attacks difficult, because of the absence of timing references for the algorithm beginning or ending. We present two ways to implement secure clockless cryptographic circuits. The first one is based on a local synchronization at the gate level, and helps achieving close to constant emanations. The second one is more audacious as it is based merely on removing all synchronization. This approach proves to be very promising in terms of protection against sidechannel attacks, while keeping a reasonable overhead both in terms of cost and performances.
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Dates et versions

hal-00472064 , version 1 (09-04-2010)

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Citer

Sylvain Guilley, Sumanta Chaudhuri, Laurent Sauvage, Jean-Luc Danger, Taha Beyrouthy, et al.. Updates on the Potential of Clock-Less Logics to Strengthen Cryptographic Circuits against Side-Channel Attacks. IEEE International Conference on Electronics and Systems (ICECS'09), Dec 2009, Hammamet, Tunisia. pp.351 - 354, ⟨10.1109/ICECS.2009.5411008⟩. ⟨hal-00472064⟩
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