The current demands in nowadays applications within the domain of wireless communications and/or data transmissions are focusing on multi-standards handsets. Indeed, customers are deeply looking for even more powerful devices while still targeting the cheapest at the same time. Thus an incredible challenge is now facing the RF design community: designing general purpose RF integrated circuits, supposed to be able to deal with any kind of present and future standards, at the lowest the possible cost. This archetype imposes both flexibility and reconfigurability to the RF systems while it maintains, if not increase, the constraints of low cost and adaptability. These constraints are of course associated with a critical low power consumption limit, since portability is a key parameter whatever the considered product. To address the next generation RF systems the concept of Software Radio (SR) receivers is to be considered. Indeed such systems are based on the digital paradigm and, thus, are highly reconfigurable thanks to programmability. However, it appears that the state-of-the-art characteristics of both data converters and Digital Signal Processors (DSP), which are key building blocks for SR architectures, are unsuited due to too high a data rate and too large a dynamic range, not mentioning power consumption. Thus disruptive RF receiver architectures are now expected, to pave the way for full SR solutions. Relying on a Sampled Analog Signal Processor (SASP) is a possible approach, which brings several advantages such as a simple concurrent receiver implementation, wideband capabilities, and dramatically reduced constraints on the digital blocks of the overall system. The current status of research activities in sampled analog system design and its application to SR implementation is reviewed in this talk, as well as other potential appliance such as digital video processing or parallel channel sensing. An experimental prototype of the SASP and its measurements are also presented and discussed.