Analysis and Synthesis of Cycle-Accurate On-Chip Traffic with Long-Range Dependence
Résumé
In this report we propose a stochastic traffic analysis and synthesis method- ology adapted to on-chip network traffic. This work confirms and extends re- cent works (Marculescu et al. [13]) by providing more precise (cycle-accurate) simulations. Our framework based on System-C simulations is able to model precisely the latency of each request-acknowledge transaction or aggregated throughput taking into account its bursty behavior. Our experiments show that on-chip traffic is non-stationary, with long-range-dependence property and that simulation platforms of systems-on-chip will now need to use advanced statis- tical models for traffic simulation.
Domaines
Architectures Matérielles [cs.AR]Origine | Fichiers produits par l'(les) auteur(s) |
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