Current reuse CMOS LNA for UWB applications
Résumé
To comply with the low power low voltage design constrains in modern RF CMOS technologies, a new LNA topology is here proposed. Implemented in a standard 130nm CMOS technology, two circuits operating under a 1.4V nominal voltage are reported. The first one dedicated to lower band of European UWB allocation –i.e. 3-5GHz- achieves a 13.8dB maximum gain for a 5.8mA current consumption. NF is so included in a 4.2 to 6.1 dB range. The second LNA addresses the 6-10GHz upper band. It performs a 12.2dB maximum gain and a 4.5dB NFmin for a 3 mA current consumption. Both circuits exhibit a more than -10dB input return loss over the considered bandwidth. S21 even reaches a 9dB and 11dB, respectively, when LNA core is supplied under 0.9V. Matching the input network order to the addressed bandwidth affords each circuit implementation to be included within a 1.8mm² silicon area.