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Communication Dans Un Congrès Année : 2006

CNTFET-based logic gates and simulation

Résumé

This paper deals with the analysis of several logic gates (inverter, NAND, NOR) based on carbon nanotube transistors. By using available compact models we have simulated and analyzed the impact of diameter and contact resistance variations on the transfer characteristics. An interesting conclusion is that CMOS-like gates with non-homogeneous diameters may show better characteristics in comparison with homogeneous diameter ones. Our work represents a first step towards parametric faults modeling for logic circuits based on CNTFET.

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Dates et versions

hal-00156737 , version 1 (22-06-2007)

Identifiants

  • HAL Id : hal-00156737 , version 1

Citer

T. Dang, Lorena Anghel, Régis Leveugle. CNTFET-based logic gates and simulation. IEEE International Design and Test Workshop (IDT'06, Nov 2006, Dubai, United Arab Emirates. 6 p. ⟨hal-00156737⟩

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