Efficiency of transient bit-flips detection by software means: a complete study
Résumé
This-paper characterizes the effectiveness of an error detection technique that addresses transient faults induced by the environment (radiation, EMC) in processor-based architectures. Experimental results obtained from fault injection sessions performed on two platforms built around a 32-bit digital signal processor and an 8-bit microcontroller, provide objective figures about the efficiency of the proposed approach.
Mots clés
fault-tolerance
software-error-detection-technique
safety-critical-applications
transient-bit-flip-detection-efficiency
environment-induced-transient-faults
radiation-induced-faults
EMC-induced-faults
processor-based-architectures
fault-injection
digital-signal-processor
microcontroller-
single-event-upset
SEU-
32-bit
8-bit