Multiple adjacent image processing for automated failure location using electron beam testing [VLSI]
Résumé
Voltage contrast is a powerful technique for the visualisation of the internal logic states of integrated circuits. However, the vast quantity of image information produced from a VLSI circuit makes detailed interpretation impractical, especially in the case where CAD data is unavailable (e.g. failure analysis). Often, single difference images are used between a failed circuit and a functional one, in small suspect regions. The authors present the more powerful multiple adjacent image processing (MAIP) approach which enables fully automated comparisons of very large circuit areas to be made. The automatic alignment algorithms for fine image registration before subtraction are discussed. Results are then presented of experiments carried out on the MC68000 microprocessor, in which faults have been successfully located. Another application of the MAIP technique is that of activity mapping in 80C86 microprocessors in order to assess the radiation susceptibility of particular machine instructions.
Mots clés
IC-
automated-failure-location
electron-beam-testing
visualisation-
internal-logic-states
integrated-circuits
VLSI-circuit
multiple-adjacent-image-processing
automatic-alignment-algorithms
fine-image-registration
MC68000-microprocessor
MAIP-technique
activity-mapping
80C86-microprocessors
radiation-susceptibility