Vertical GaN devices: Reliability challenges and lessons learned from Si and SiC
Résumé
We discuss recent advancements in the development of vertical GaN devices, and the related
reliability challenges. Key results indicate that: (i) vertical GaN devices can show high performance, low background doping, and kV-range breakdown voltages; avalanche capability (a property of Si and SiC devices) is demonstrated also for vertical devices on silicon substrate, enabling reliable
high-voltage operation; (ii) threshold voltage instabilities are related to the presence of interface and border traps, whose contribution can be modeled with great accuracy by prior characterization of the trap distribution profile; (iii) gate stack reliability is mainly limited by oxide breakdown; factors
limiting off-state failure are discussed. Strategies for device improvement are proposed, also based on the learnings from silicon and silicon carbide technology.