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Extending Rate Monotonic Analysis with Exact Cost of Preemptions for Hard Real-Time SystemsProceedings of 19th Euromicro Conference on Real-Time Systems, ECRTS'07, 2007, Pisa, Italy
Conference papers
inria-00413487v1
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Un profil UML pour la modélisation multiniveau[Rapport de recherche] RR-7287, INRIA. 2010
Reports
inria-00482727v1
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Temps Logique pour l'ingénierie dirigée par le modèlesModeling and Simulation. Université Nice Sophia Antipolis, 2010
Habilitation à diriger des recherches
tel-00541140v1
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Toward a TLM to RTL refinement : a formal approach3rd Junior Researcher Workshop on Real-Time Computing (JRWRTC 2009), Oct 2009, Paris, France
Conference papers
inria-00494224v1
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An Automated Process for Designing UML Profiles[Research Report] RR-6599, INRIA. 2008
Reports
inria-00308386v1
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Scheduling Multi Clock Real Time Systems: From Requirements to ImplementationInternational Symposium on Object/Component/Service-oriented Real-time Distributed Computing, Mar 2011, Newport Beach, United States. pp.50; 57, ⟨10.1109/ISORC.2011.16⟩
Conference papers
inria-00586851v1
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Semantic Multi-View model for Low-PowerJournées nationales IDM, CAL, et du GDR GPL, Jun 2011, Lille, France. pp.19
Conference papers
hal-00596239v1
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Automatic implementation of TTEthernet-based time-triggered avionics applicationsDASIA 2015, Eurospace, May 2015, Barcelone, Spain
Conference papers
hal-01264687v1
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A multiform time approach to real-time system modeling: Application to an automotive systemIEEE Int. Symp. on Industrial Embedded Systems (SIES), Jul 2007, Lisbon, Portugal. pp.234-241, ⟨10.1109/SIES.2007.4297340⟩
Conference papers
inria-00204508v1
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Modeling Time(s)ACM/IEEE Int. Conf. on Model Driven Engineering Languages and Systems (MoDELS/UML), Oct 2007, Nashville, TN, United States. pp. 559-573, ⟨10.1007/978-3-540-75209-7_38⟩
Conference papers
inria-00204489v1
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Modeling of Immediate vs. Delayed Data Communications: from AADL to UML MARTEECSI Forum on specification & Design Languages (FDL), ECSI, Sep 2007, Barcelona, Spain. pp.249-254
Conference papers
inria-00204484v1
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Multilevel Modeling Paradigm in Profile Definition[Research Report] RR-6525, INRIA. 2008, pp.17
Reports
inria-00276653v3
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Application Architecture Adequacy through an FFT case studyJRWRTC2013 - 7th Junior Researcher Workshop on Real-Time Computing, Sebastian Altmeyer, Oct 2013, Sophia Antipolis, France. pp.4
Conference papers
hal-00950533v1
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Mixed Criticality on Multicore/Manycore Platforms (Dagstuhl Seminar 15121)Dagstuhl Seminar on Mixed Criticality on Multicore/Manycore Platforms , Mar 2015, Dagstuhl, Germany. , 2015, ⟨10.4230/DagRep.5.3.84⟩
Proceedings
hal-01244394v1
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A Methodology for Improving Software Design Lifecycle in Embedded Control SystemsDATE 2008 - Design, Automation and Test in Europe, Mar 2008, Munich, Germany
Conference papers
inria-00274634v1
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Ordonnancement multiprocesseur global basé sur la laxité avec migrations restreintesROADEF 2011, Mar 2011, Saint-Étienne, France. 2 pp
Conference papers
hal-00620394v1
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Multi-View Power Modeling based on UML MARTE and SysML[Research Report] RR-7934, INRIA. 2012, pp.19
Reports
hal-00688853v1
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Lazy Parallel Synchronous Composition of In finite Transition SystemsInternational Conference on ICT in Education, Research and Industrial Applications, Jun 2013, Kherson, Ukraine. pp.130-145
Conference papers
hal-00839978v1
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SIRALINA: efficient two-steps heuristic for storage optimisation in single period task schedulingJournal of Combinatorial Optimization, 2011, 22 (4), pp.819-844. ⟨10.1007/s10878-010-9332-8⟩
Journal articles
inria-00636028v1
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Compositional Verification of Evolving SPL[Research Report] RR-8125, INRIA. 2012, pp.34
Reports
hal-00747533v1
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Power consumption analysis using multi-view modelingPATMOS - 23th International Workshop on Power and Timing Modeling, Optimization and Simulation, Sep 2013, Karlsruhe, Germany. pp.235-238, ⟨10.1109/PATMOS.2013.6662180⟩
Conference papers
hal-00906733v1
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A timing model for specifying multi clock automotive systems. The Timing Augmented Description Language V2ICECCS 2012 - 17th International Conference on Engineering of Complex Computer Systems, Jul 2012, Paris, France. pp.230-239
Conference papers
hal-00687562v1
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Dynamic Thread Pinning for Phase-Based OpenMP ProgramsThe Euro-Par 2013 conference, Aug 2013, Aachen, Germany. pp.53-64, ⟨10.1007/978-3-642-40047-6_8⟩
Conference papers
hal-00847482v1
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Periodic scheduling of marked graphs using balanced binary words[Research Report] RR-7891, INRIA. 2012, pp.33
Reports
hal-00672606v1
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Generation and Validation of Traces between Requirements and Architecture based on Formal Trace SemanticsJournal of Systems and Software, 2013, ⟨10.1016/j.jss.2013.10.006⟩
Journal articles
hal-00871318v1
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Verification of MARTE/CCSL Time Requirements in Promela/SPINIEEE ICECCS 2011 - 16th IEEE International Conference on Engineering of Complex Computer Systems, Apr 2011, Las Vegas, United States. ⟨10.1109/ICECCS.2011.14⟩
Conference papers
hal-00650621v1
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The Time Model of Logical Clocks available in the OMG MARTE profileSandeep K. Shukla and Jean-Pierre Talpin. Synthesis of Embedded Software: Frameworks and Methodologies for Correctness by Construction, Springer Science+Business Media, LLC 2010, pp.28, 2010, 978-1-4419-6399-4
Book sections
inria-00495664v1
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A model for requirements traceability in an heterogeneous model-based design process. Application to automotive embedded systemsICECCS'10, IEEE, Mar 2010, Oxford, United Kingdom. pp.233-242, ⟨10.1109/ICECCS.2010.13⟩
Conference papers
inria-00484073v1
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Modèle de contraintes temporelles pour systèmes polychronesJournal Européen des Systèmes Automatisés (JESA), 2009, 7-9 (43), pp.725-739
Journal articles
inria-00434462v1
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Semantics-Preserving Implementation of Synchronous Specifications Over Dynamic TDMA Distributed ArchitecturesInternational Conference on Embedded Software (EMSOFT), Oct 2010, Scottsdale, AZ, United States. pp.199-208, ⟨10.1145/1879021.1879048⟩
Conference papers
inria-00544665v1
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