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The case of using CMOS FD-SOI rather than CMOS bulk to harden ICs against laser attacks

Jean-Max Dutertre , Vincent Beroulle , Philippe Candelier , Louis-Barthelemy Faber , Marie-Lise Flottes , et al.
IOLTS: International On-Line Testing Symposium, Jul 2018, Platja d’Aro, Spain. pp.214-219, ⟨10.1109/IOLTS.2018.8474230⟩
Conference papers emse-01856000v1
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Cross-Layer Inference Methodology for Microarchitecture-aware Fault Models

Ihab Alshaer , Brice Colombier , Christophe Deleuze , Paolo Maistri , Vincent Beroulle
Microelectronics Reliability, 2022, 139, ⟨10.1016/j.microrel.2022.114841⟩
Journal articles hal-03848691v1

Software BIST capabilities of a symmetric cipher

Paolo Maistri , C. Excoffon , Régis Leveugle
International Conference on Electronics, Circuits and Systems (ICECS), Sep 2008, Saint Julians, Malta. pp.414-417
Conference papers hal-00321960v1
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Secure Test with RSNs: Seamless Authenticated Extended Confidentiality

Paolo Maistri , V. Reynaud , Michele Portolan , Régis Leveugle
19th IEEE International New Circuits and Systems Conference (NEWCAS 2021), Jun 2021, Toulon, France
Conference papers hal-03287523v1
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Electromagnetic Leakage Assessment of a Proven Higher-Order Masking of AES S-Box

Nicolas Bordes , P. Maistri
25th Euromicro Conference on Digital System Design (DSD 2022), Aug 2022, Maspalomas, Spain
Conference papers hal-03757964v1
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Flexible and Portable Management of Secure Scan Implementations Exploiting P1687.1 Extensions

Michele Portolan , Emanuele Valea , Paolo Maistri , Giorgio Di Natale
IEEE Design & Test, 2022, IEEE Design & Test, 39 (3), pp.117-124. ⟨10.1109/MDAT.2021.3117875⟩
Journal articles hal-03370952v1

On Fault Injections for Early Security Evaluation vs. Laser-based Attacks

Régis Leveugle , A. Chahed , Paolo Maistri , A. Papadimitriou , D. Hély , et al.
1st IEEE International Verification and Security Workshop, Jul 2016, St Feliu de Guixols, Spain. pp.33-38
Conference papers hal-01444970v1

FPGA emulation of laser attacks against secure deep submicron integrated circuits

A. Papadimitriou , D. Hély , V. Beroulle , Paolo Maistri , Régis Leveugle
7ème Colloque du GdR SoC-SiP, Jun 2013, Lyon, France
Conference papers hal-01400108v1

Countermeasures against fault attacks: The good, the bad, and the ugly

Paolo Maistri
17th IEEE International On-Line Testing Symposium (IOLTS'11), Jul 2011, Athenes, Greece. pp.134-137, ⟨10.1109/IOLTS.2011.5993825⟩
Conference papers hal-00651925v1

HLS Design of a Hardware Accelerator for Homomorphic Encryption

A. Mkhinini , Paolo Maistri , Régis Leveugle , Rached Tourki
IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2017), Apr 2017, Dresden, Germany
Conference papers hal-01710778v1

Countermeasures against Implementation Attacks on Private- and Public-Key Cryptosystems

Paolo Maistri
International Conference on Applications and Techniques in Information Security, Oct 2016, Cairns, Australia
Conference papers hal-01459849v1

Evaluation of register-level protection techniques for the Advanced Encryption Standard by multi-level fault injections

Paolo Maistri , Pierre Vanhauwaert , Régis Leveugle
International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'07), Sep 2007, Rome, Italy. pp.499-507
Conference papers hal-00185903v1

Validation of RTL laser fault injection model with respect to layout information

A. Papadimitriou , M. Tampas , D. Hély , V. Beroulle , Paolo Maistri , et al.
IEEE International Symposium on Hardware Oriented Security and Trust (HOST'15), May 2015, McLean, VA, United States. pp.78-81
Conference papers hal-01393414v1

Electromagnetic attacks on embedded devices: a model of probe-circuit power coupling

D. Alberto , Paolo Maistri , Régis Leveugle
9th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS), May 2014, Santorini, Greece. pp.23-28, ⟨10.1109/DTIS.2014.6850648⟩
Conference papers hal-01061232v1
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HLS-Based Methodology for Fast Iterative Development Applied to Elliptic Curve Arithmetic

Simon Pontie , Alban Bourge , Adrien Prost-Boucle , Paolo Maistri , Olivier Muller , et al.
2016 Euromicro Conference on Digital System Design (DSD), 2016, Limassol, Cyprus. pp.511-518, ⟨10.1109/DSD.2016.51⟩
Conference papers hal-01389247v1

Dependability analysis of a countermeasure against fault attacks by means of laser shots onto a SRAM-based FPGA

G. Canivet , Paolo Maistri , Régis Leveugle , J. Clédière , F. Valette , et al.
21st IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 10), Jul 2010, Rennes, France. pp.115-122
Conference papers hal-00544935v1

Towards Virtual Fault-based Attacks for Security Validation

Régis Leveugle , M. Ben Jrad , Paolo Maistri
IARIA Fourth International Conference on Dependability (DEPEND'11), Aug 2011, Nice, France. pp.1-6
Conference papers hal-00643930v1

Forecasting the effects of electromagnetic fault injections on embedded cryptosystems

D. Alberto , Paolo Maistri , Régis Leveugle
Information Security Journal: A Global Perspective, 2013, 22 (5-6), ⟨10.1080/19393555.2014.891278⟩
Journal articles hal-01142403v1

A flexible RNS-based large polynomial multiplier for Fully Homomorphic Encryption

A. Mkhinini , Paolo Maistri , Régis Leveugle , Rached Tourki , M. Machhout
11th IEEE International Design & Test Symposium (IDT'16), Dec 2016, Hammamet, Tunisia. pp.131-136
Conference papers hal-01459845v1

On the development of a new countermeasure on a laser attack RTL fault model

C. Ananiadis , A. Papadimitriou , D. Hély , V. Beroulle , Paolo Maistri , et al.
Design, Automation and Test in Europe Conference (DATE'16), Mar 2016, Dresden, Germany
Conference papers hal-01414728v1

An operation-centered approach to fault detection in symmetric cryptography ciphers

L. Breveglieri , I. Koren , Paolo Maistri
IEEE Transactions on Computers, 2007, 56 (5), pp.635-649. ⟨10.1109/TC.2007.1015⟩
Journal articles hal-00419366v1

Software-based BIST capabilities of the Advanced Encryption Standard

C. Excoffon , Paolo Maistri , Régis Leveugle
Electronic Symposium Digest of 13th IEEE European Test Symposium (ETS'08), May 2008, Verbania, Italy
Conference papers hal-00319898v1

Multi-cycle Fault Injections in Error Detecting Implementations of the Advanced Encryption Standard

Paolo Maistri , Régis Leveugle
International Design and Test Workshop (IDT'07), Dec 2007, Cairo, Egypt. pp.15-20
Conference papers hal-00202112v1

Double-Data-Rate computation as a countermeasure against fault analysis

Paolo Maistri , Régis Leveugle
IEEE Transactions on Computers, 2008, Vol. 57 (no. 11, November), pp.1528-1539. ⟨10.1109/TC.2008.149⟩
Journal articles hal-00348325v1
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Ray-Spect: Local Parametric Degradation for Secure Designs

Nasr-Eddine Ouldei Tebina , Laurent Maingault , Nacer-Eddine Zergainoh , Guillaume Hubert , Paolo Maistri
29th IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS 2023), Jul 2023, Chania, Greece. pp.1-7
Conference papers hal-04172463v1

10-gigabit throughput and low area for a hardware implementation of the Advanced Encryption Standard

Paolo Maistri , Régis Leveugle
14th Euromicro/IEEE Conference on Digital System Design (DSD'11), Aug 2011, Oulu, Finland. pp.266-269, ⟨10.1109/DSD.2011.37⟩
Conference papers hal-00643927v1

Countermeasures against EM analysis for a secured FPGA-based AES implementation

Paolo Maistri , Sébastien Tiran , Philippe Maurine , Israel Koren , Régis Leveugle
ReConFig'13: International Conference on ReConFigurable Computing and FPGAs, Dec 2013, Cancun, Mexico. pp.1-6, ⟨10.1109/ReConFig.2013.6732274⟩
Conference papers hal-00963133v1

FPGA emulation of laser attacks against secure deep submicron integrated circuits

P. Papavramidou , D. Hély , V. Beroulle , Paolo Maistri , Régis Leveugle
Second Workshop on Trustworthy Manufacturing and Utilization of Secure Devices (TRUDEVICE'14), May 2014, Paderborn, Germany
Conference papers hal-01132405v1
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A Comprehensive End-to-end Solution for a Secure and Dynamic Mixed-signal 1687 System

Michele Portolan , R. Silveira Feitoza , G. Takam Tchendjou , V. Reynaud , K. Senthamarai Kannan , et al.
2020 International Symposium on On-Line Testing and Robust System Design (IOLTS 2020), Jul 2020, Naples (Virtual Conference), Italy. ⟨10.1109/IOLTS50870.2020.9159721⟩
Conference papers hal-02939302v1

Accès autorisé au réseau reconfigurable de test par ensemble de segments

V. Reynaud , Paolo Maistri , Régis Leveugle
13ème Colloque du GDR SoC/SiP, Jun 2018, Paris, France
Conference papers hal-01921182v1