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93 Results
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A Computation Core for Communication Refinement of Digital Signal Processing AlgorithmsDSD '06: Proceedings of the 9th EUROMICRO Conference on Digital System Design, Aug 2006, Cavtat, Croatia. pp.240--250
Conference papers
hal-00332396v1
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Synthèse de haut niveau en tenant compte de la dynamique des traitementsRevue des Sciences et Technologies de l'Information - Série TSI : Technique et Science Informatiques, 2008, 27 (9), pp.1129-1154
Journal articles
hal-00389847v1
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Determination of a specialized processor for the resolution of linear systems arising in the application of the finite element methodJournal de Physique III, 1993, 3 (3), pp.531-538. ⟨10.1051/jp3:1993146⟩
Journal articles
istex
jpa-00248938v1
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Efficient Software Synthesis of Dynamic Dataflow ProgramsICASSP 2014, May 2014, Florence, Italy. pp.1
Conference papers
hal-00988003v1
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Improving the CubeSat Reliability Thanks to a Multiprocessor System using Fault Tolerant Online SchedulingMicroprocessors and Microsystems: Embedded Hardware Design , 2021, 85, pp.1-12. ⟨10.1016/j.micpro.2021.104312⟩
Journal articles
hal-03317768v1
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Comparison of Enhancing Methods for Primary/Backup Approach Meant for Fault Tolerant Scheduling[Research Report] Univ Rennes, Inria, CNRS, IRISA, France. 2021
Reports
hal-03405142v1
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Towards run-time actor mapping of dynamic dataflow programs onto multi-core platformsInternational Symposium on Image and Signal Processing and Analysis (ISPA), Sep 2013, Trieste, Italy. pp.725 - 730
Conference papers
hal-00909408v1
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Stochastic Modeling for Floating-point to Fixed-point ConversionIEEE Workshop on Signal Processing Systems (SiPS), Oct 2011, Beirut, Lebanon. pp.180-185
Conference papers
hal-00746791v1
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Ordonnancement Spatio-Temporel 3D minimisant le coût de communications entre tâchesXXIVe Colloque Gretsi - Traitement du Signal et des Images, Sep 2013, Brest, France. pp.1-7
Conference papers
hal-00921867v1
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Dataflow program implementation onto a heterogeneous multiprocessor platformMETODO, Oct 2014, Madrid, France
Conference papers
hal-01075481v1
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Demo abstract : FPGA-based implementation of a flexible FFT dedicated to LTE standardConference on Design and Architectures for Signal and Image Processing (DASIP), Demo Night, Oct 2016, Rennes, France. , Conference on Design and Architectures for Signal and Image Processing (DASIP), Demo Night, pp.2, 2016
Poster communications
hal-01354992v1
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Electronic System Level to Hw/Sw Design Flow2004, pp.1-6
Conference papers
hal-00079258v1
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A Formal Method for Hardware IP Design and Integration under I/O and Timing ConstraintsACM Transactions on Embedded Computing Systems (TECS), 2006, vol 5, No. 1, pp.29-53. ⟨10.1145/1132357.1132359⟩
Journal articles
hal-00077729v1
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Spécification et conception de systèmes sur puce : SystemC et approches actuelles3èmes journées scientifiques des jeunes chercheurs en Génie Electrique et Informatique, 2003, Mahdia, Tunisie
Conference papers
hal-00105043v1
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Design exploration and HW/SW rapid prototyping for real-time system design2005, pp.240-242
Conference papers
hal-00079263v1
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Dynamic Memory Access Management for High-Performance DSP Applications Using High-Level SynthesisIEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2008, 16 (11), pp.1454-1464. ⟨10.1109/TVLSI.2008.2000821⟩
Journal articles
hal-00361870v1
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A Coarse-Grain Reconfigurable Hardware Architecture for RVC-CAL-based DesignDesign and Architectures for Signal and Image Processing, Oct 2010, Edinburgh, United Kingdom
Conference papers
inria-00554250v1
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MASCARA-FPGA cooperation model: Query Trimming through acceleratorsSSDBM 2021 - 33rd International Conference on Scientific and Statistical Database Management, Jul 2021, Tampa, United States. pp.203-208, ⟨10.1145/3468791.3468795⟩
Conference papers
hal-03503635v1
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Efficient Maximal Convex Custom Instruction Enumeration for Extensible ProcessorsConference on Design and Architectures for Signal and Image Processing (DASIP), Nov 2011, Tampere, Finland
Conference papers
hal-00746777v1
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Fault-Tolerant Online Scheduling Algorithms for CubeSatsPARMA-DITAM’20 - 11th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architecture, 9th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, Jan 2020, Bologna, Italy
Conference papers
hal-02461164v1
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Near-optimal Energy-Efficient Partial-Duplication Mapping of Real-Time Parallel ApplicationsAEiC 2022 - 26th Ada-Europe International Conference on Reliable Software Technologies, Jun 2022, Ghent, Belgium. pp.1-26
Conference papers
hal-03907727v1
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High Level Synthesis Assisted Rapid Prototyping for Digital Signal ProcessingIEEE International Conference on Microelectronics, Dec 2004, Tunis, Tunisia. pp.000
Conference papers
hal-00389850v1
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Dynamic memory access management and address computation for dataflow applicationsthe IFIP International Conference on Very Large Scale Integration (VLSI-SOC'05), Oct 2005, Perth, Australia. pp.152-157
Conference papers
hal-00179910v1
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Bounded budgeted parallel architecture versus control dominated architecture for hazard data-signal processors synthesisthe SPIE Conference, Microtechnologies for the New Millennium (SPIE'05), May 2005, Sevilla, Spain. pp.100-111
Conference papers
hal-00179896v1
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High-Level Synthesis for Designing Multimode ArchitecturesIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2010, 29 (11), pp.1736
Journal articles
hal-00551454v1
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MASCARA (ModulAr Semantic CAching fRAmework) towards FPGA acceleration for IoT Security monitoringVLIoT 2020 - International Workshop on Very Large Internet of Things, Sep 2020, Tokyo, Japan. pp.14-23
Conference papers
hal-03017402v1
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Energy-aware Partial-Duplication Task Mapping under Real-Time and Reliability ConstraintsSAMOS 2020 - International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, Jul 2020, Samos / Virtual, Greece
Conference papers
hal-02927474v1
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Reconfigurable SWP Operator for Multimedia ProcessingASAP 2009 - 20th IEEE International Conference on Application-Specific Systems Architectures and Processors, Jul 2009, Boston, United States. pp.199-202, ⟨10.1109/ASAP.2009.13⟩
Conference papers
inria-00432572v1
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Exact Custom Instruction Enumeration for Extensible ProcessorsIntegration, the VLSI Journal, 2012, 45 (2), pp.263-270. ⟨10.1016/j.vlsi.2011.11.011⟩
Journal articles
hal-00746877v1
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Exploiting Reconfigurable SWP Operators for Multimedia ApplicationsICASSP: International Conference on Acoustics, Speech and Signal Processing, May 2011, Prague, Czech Republic
Conference papers
inria-00567017v1
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