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16 Results
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Loop-based Modeling of Parallel Communication Traces[Research Report] RR-8562, INRIA. 2014, pp.10
Reports
hal-01044636v1
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Dynamic Re-Vectorization of Binary CodeInternational Conference on Embedded Computer Systems: Architectures, Modeling and Simulation - SAMOS XV, Jul 2015, Agios Konstantinos, Greece
Conference papers
hal-01155207v1
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Profiling Data-Dependence to Assist Parallelization: Framework, Scope, and OptimizationMICRO-45, The 45th Annual IEEE/ACM International Symposium on Microarchitecture, Dec 2012, Vancouver, Canada
Conference papers
hal-00780782v1
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Improving X10 Program Performances by Clock Removal23rd International Conference on Compiler Construction (CC’14), part of ETAPS’14, Apr 2014, Grenoble, France
Conference papers
hal-00924206v1
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Efficient Memory Tracing by Program SkeletonizationIEEE International Symposium on Performance Analysis of Systems and Software, ISPASS, Apr 2011, Austin, United States
Conference papers
inria-00544497v1
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Prediction and trace compression of data access addresses through nested loop recognition6th annual IEEE/ACM international symposium on Code generation and optimization, Apr 2008, Boston, United States. pp.94-103, ⟨10.1145/1356058.1356071⟩
Conference papers
inria-00504597v1
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Recovering the Memory Behavior of Executable Programs10th IEEE Working Conference on Source Code Analysis and Manipulation, SCAM, Sep 2010, Timisoara, Romania
Conference papers
inria-00502813v1
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A Space and Bandwidth Efficient Multicore Algorithm for the Particle-in-Cell Method PPAM 2017 - 12th International Conference on Parallel Processing and Applied Mathematics, Sep 2017, Lublin, Poland. pp.1-12
Conference papers
hal-01649172v1
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Polyhedral parallelization of binary codeACM Transactions on Architecture and Code Optimization, 2012, Special issue on high-performance and embedded architectures and compilers, 8 (4), pp.39:1--39:21. ⟨10.1145/2086696.2086718⟩
Journal articles
hal-00664370v1
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Recovering memory access patterns of executable programsScience of Computer Programming, 2014, 80, pp.440-456. ⟨10.1016/j.scico.2012.08.002⟩
Journal articles
hal-00909961v1
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Improving parallel executions by increasing task granularity in task-based runtime systems using acyclic DAG clusteringPeerJ Computer Science, 2020, ⟨10.7717/peerj-cs.247⟩
Journal articles
hal-02436826v1
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Aspects de la classification dans un système de représentation des connaissances par objetsSixièmes rencontres de la société francophone de classification, Olivier Gascuel et Gilles Caraux, 1998, Montpellier, France. pp.205-209
Conference papers
inria-00098721v1
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Transparent Parallelization of Binary CodeFirst International Workshop on Polyhedral Compilation Techniques, IMPACT 2011, in conjunction with CGO 2011, Christophe Alias, Cédric Bastoul, Apr 2011, Chamonix, France
Conference papers
inria-00572797v1
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Rec2Poly: Converting Recursions to Polyhedral Optimized Loops Using an Inspector-Executor StrategySAMOS 2020: Embedded Computer Systems: Architectures, Modeling, and Simulation, pp.96-109, 2020, ⟨10.1007/978-3-030-60939-9_7⟩
Book sections
hal-02971434v1
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Hardware/Software Helper Thread Prefetching On Heterogeneous Many Cores2014 IEEE 26th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), Oct 2014, Paris, France. ⟨10.1109/SBAC-PAD.2014.39⟩
Conference papers
hal-01087752v1
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PADRONE: a Platform for Online Profiling, Analysis, and OptimizationDCE 2014 - International workshop on Dynamic Compilation Everywhere, Jan 2014, Vienne, Austria
Conference papers
hal-00917950v1
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