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31 Results
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How Constraints Programming Can Help You in the Generation of Optimized Application Specific Reconfigurable Processor ExtensionsInternational Conference on Engineering of Reconfigurable Systems & Algorithms (ERSA 2009), Jul 2009, Las Vegas, United States
Conference papers
inria-00449775v1
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Resilience and fault tolerance in high-performance computing for numerical weather and climate predictionInternational Journal of High Performance Computing Applications, 2021, 35 (4), pp.285-311. ⟨10.1177/1094342021990433⟩
Journal articles
hal-03138061v1
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Scalable HEVC Decoder for Mobile Devices: Trade-offs between Energy Consumption and QualityConference on Design and Architectures for Signal and Image Processing (DASIP), Oct 2016, Rennes, France
Conference papers
hal-01415938v1
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Déploiement d'applications multimédia sur architecture reconfigurable à gros grain : modélisation avec la programmation par contraintesArchitectures Matérielles [cs.AR]. Université Rennes 1, 2011. Français. ⟨NNT : ⟩
Theses
tel-00642330v1
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Graph Constraints in Embedded System DesignWorshop on Combinatorial Optimization for Embedded System Design (COESD 2010), Jun 2010, Bologne, Italy
Conference papers
inria-00481135v1
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French SKA White Book - The French Community towards the Square Kilometre ArrayC. Ferrari; G. Lagache; E. Josselin; N. Vilmer; P. Zarka; S. Corbel; S. Vergani; S. Lambert; G. Theureau; S. Bosse; A. Ferrari; S. Gauffre; G. Marquette; J.-M. Martin; B. Semelin; M. Alves; K. Ferrière; M.-A. Miville-Deschenes; L. Montier. 2018, ⟨10.48550/arXiv.1712.06950⟩
Books
hal-01686223v1
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VECMAtk: a scalable verification, validation and uncertainty quantification toolkit for scientific simulationsPhilosophical Transactions of the Royal Society A: Mathematical, Physical and Engineering Sciences, 2021, 379 (2197), ⟨10.1098/rsta.2020.0221⟩
Journal articles
hal-03452470v1
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A modified HEVC decoder for low power decoding12th ACM International Conference on Computing Frontiers, May 2015, Ischia, France. ⟨10.1145/2742854.2747284⟩
Conference papers
hal-01157934v1
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HEVC Decoding with Tunable Image Quality - Subjective evaluation2015
Other publications
hal-01119964v1
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Low Power HEVC Software Decoder for Mobile DevicesJournal of Real-Time Image Processing, 2016, 12 (2), pp.495-507. ⟨10.1007/s11554-015-0512-8⟩
Journal articles
hal-01334099v1
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Scheduling, Binding and Routing System for a Run-Time Reconfigurable Operator Based Multimedia ArchitectureInternational Journal of Embedded and Real-Time Communication Systems, 2012, 3 (1), pp.1-30. ⟨10.4018/jertcs.2012010101⟩
Journal articles
hal-00663458v1
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Different input-output properties throughout the cortex as revealed by TMS-EEG3rd International Brain Stimulation Conference, Feb 2019, Vancouver, Canada. 12 (2), pp.511-512, 2019
Poster communications
hal-02011578v1
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Implementation of Stereo Matching Using High Level Compiler for Parallel Computing Acceleration27th Image and Vision Computing New Zealand (IVCNZ), Nov 2012, Dunedin, New Zealand. pp.NC
Conference papers
hal-00763852v1
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Architecture-Driven Synthesis of Reconfigurable Cells12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools (DSD 2009), Aug 2009, Patras, Greece. pp.531-538
Conference papers
inria-00449757v1
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Parallelisation of the Wide-Band Wide-Field Spectral Deconvolution Framework DDFacet on Distributed Memory HPC SystemADASS, Nov 2020, Grenada, Spain
Conference papers
hal-02611036v3
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Orcc's Compa-Backend demonstrationConference on Design and Architectures for Signal and Image Processing, Demo Night, Oct 2014, Madrid, Spain. 2014
Poster communications
hal-01059858v1
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Energy Efficiency of a Parallel HEVC Software Decoder for Embedded DevicesComputing Frontiers, May 2015, Ischia, Italy. pp.62:1--62:6, ⟨10.1145/2742854.2747286⟩
Conference papers
hal-01154295v1
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Real-Time Low Power Software HEVC Decoder on Embedded GPP: A Side-by-Side ComparisonDesign and Architectures for Signal and Image Processing (DASIP), Sep 2015, Cracow, Poland
Conference papers
hal-01205912v1
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Décodeur Video HEVC basse consommationXXVème colloque GRETSI, Sep 2015, Lyon, France
Conference papers
hal-01197057v1
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Design of Processor Accelerators with Constraints8th workshop of the Network for Sweden-based researchers and practitioners of Constraint programming, May 2009, Linköping, Sweden
Conference papers
inria-00449820v1
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Scheduling, Binding and Routing System for a Run-Time Reconfigurable Operator Based Multimedia ArchitectureDesign and Architectures for Signal and Image (DASIP), Oct 2010, Edinburgh, United Kingdom
Conference papers
inria-00539874v1
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Detailed Evaluation of Tunable Image Quality HEVC Decoding2015
Other publications
hal-01205921v1
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A DVFS based HEVC decoder for energy-efficient software implementation on embedded processorsIEEE International Conference on Multimedia and Expo (ICME), Jun 2015, Torino, Italy. ⟨10.1109/ICME.2015.7177406⟩
Conference papers
hal-01184630v1
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DECODER, METHOD AND SYSTEM FOR DECODING MULTIMEDIA STREAMSFrance, Patent n° : WO2016059196. 2014
Patents
hal-01354642v1
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HEVC Decoding with Tunable Image Quality for Green Metadata applications2014
Other publications
hal-01119966v1
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LOW POWER SOFTWARE HEVC DECODER DEMO FOR MOBILE DEVICESIEEE International Conference on Multimedia and Expo (ICME), Jun 2015, Torino, Italy
Conference papers
hal-01184523v1
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Efficient DVFS for low power HEVC software decoderJournal of Real-Time Image Processing, 2017, 13 (1), pp.39-54. ⟨10.1007/s11554-016-0624-9⟩
Journal articles
hal-01354629v1
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Automatic Design of Application-Specific Reconfigurable Processor Extensions with UPaK Synthesis KernelACM Transactions on Design Automation of Electronic Systems, 2009, 15 (1), ⟨10.1145/1640457.1640458⟩
Journal articles
inria-00451649v1
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Exploiting Reconfigurable SWP Operators for Multimedia ApplicationsICASSP: International Conference on Acoustics, Speech and Signal Processing, May 2011, Prague, Czech Republic
Conference papers
inria-00567017v1
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HEVC Decoding with Tunable Image Quality - Power saving and complexity reduction2015
Other publications
hal-01119961v1
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