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128-bit addresses for the masses (of memory and devices)Workshop on Hot Topics in System Infrastructure (HotInfra 2023), Jun 2023, Orlando, United States
Poster communications
hal-04161640v1
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Quantization Modes for Neural Network Inference: ASIC Implementation Trade-offsInternational Joint Conference on Neural Networks (IJCNN 2023), Jun 2023, Gold Coast, Australia. ⟨10.1109/IJCNN54540.2023.10191784⟩
Conference papers
hal-04188362v1
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We had 64-bit, yes. What about second 64-bit?RISC-V Summit Europe 2023, Jun 2023, Barcelona, Spain
Poster communications
hal-04161612v1
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A gem5-based CVA6 Framework for Microarchitectural PathfindingRISC-V Summit Europe 2023, Jun 2023, Barcelona, Spain
Poster communications
hal-04161617v1
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Fast Instruction Cache Simulation is Trickier than You ThinkDroneSE and RAPIDO: System Engineering for constrained embedded systems (RAPIDO 2023), Jan 2023, Toulouse, France. pp.48-53, ⟨10.1145/3579170.3579261⟩
Conference papers
hal-04131264v1
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Toward Practical 128-bit General Purpose MicroarchitecturesIEEE Computer Architecture Letters, 2023, 22 (2), pp.81-84. ⟨10.1109/LCA.2023.3287762⟩
Journal articles
hal-04157369v1
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Élimination des appels externes des accès mémoire dans la traduction binaire dynamiqueISTE. Systèmes multiprocesseurs sur puce 1 - Architectures, ISTE - International Scientific and Technical Encyclopedia, pp.171-203, 2023, ⟨10.51926/ISTE.9021.ch7⟩
Book sections
hal-04131343v1
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Low-precision logarithmic arithmetic for neural network accelerators33rd IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 2022), IEEE, Jul 2022, Gothenburg, Sweden. ⟨10.1109/ASAP54787.2022.00021⟩
Conference papers
hal-03684585v1
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Fast simulation of future 128-bit architecturesDesign, Automation & Test in Europe Conference & Exhibition (DATE 2022), Mar 2022, Anvers (Virtual event), Afghanistan. pp.1131-1134, ⟨10.23919/DATE54114.2022.9774706⟩
Conference papers
hal-03759696v1
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Industrial AI Technologies for Next-Generation Autonomous Operations with Sustainable PerformanceIndustrial AI Technologies for Next-Generation Autonomous Operations with Sustainable Performance, River Publishers, pp.1-71, 2022, 9788770226103. ⟨10.13052/rp-9788770226103⟩
Book sections
hal-03740547v1
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Hardware-friendly AI algorithms: Ternary Neural NetworksHiPEAC Computing Systems Week (HiPEAC 2021), Oct 2021, Lyon (virtuel), France
Conference papers
hal-03417446v1
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To Pin or Not to Pin: Asserting the Scalability of QEMU Parallel Implementation24th Euromicro Conference on Digital System Design (Euromicro DSD/SEAA 2021), Sep 2021, Palermo, Italy. pp.238-245, ⟨10.1109/DSD53832.2021.00045⟩
Conference papers
hal-03417343v1
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Efficient deep learning approach for fault detection in the semiconductor industryADTC 2021 - European Nanoelectronics Applications Design & Technology Conference, Jun 2021, Grenoble, France
Conference papers
hal-03421323v1
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Component Based Framework for Designing and Validating Asynchronous Algorithms for Electrical Measurement and Protection4th IEEE International Conference on Industrial Cyber-Physical Systems (ICPS 2021), May 2021, Victoria, BC, Canada. ⟨10.1109/ICPS49255.2021.9468117⟩
Conference papers
hal-03432269v1
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Seamless Compiler Integration of Variable Precision Floating-Point ArithmeticInternational Symposium on Code Generation and Optimization (CGO 2021), Feb 2021, Atlanta, United States
Conference papers
hal-03169752v1
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Arbitrary and Variable Precision Floating-Point Arithmetic Support in Dynamic Binary Translation26th Asia and South Pacific Design Automation Conference (ASP-DAC 2021), Jan 2021, Tokyo (Virtual event), Japan
Conference papers
hal-03117382v1
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Simulation of Ideally Switched Circuits in SystemCAsia and South Pacific Design Automation Conference (ASP-DAC 2021), Jan 2021, Tokyo, Japan
Conference papers
hal-03020808v1
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Synchronization of Continuous Time and Discrete Events Simulation in SystemCIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2021, 40 (7), pp.1450 - 1463. ⟨10.1109/TCAD.2020.3019204⟩
Journal articles
hal-02926338v1
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Removing Load/Store Helpers in Dynamic Binary TranslationMulti‐Processor System‐on‐Chip, iste - international scientific and technical encyclopedia, pp.133-160, 2021, 9781789450217. ⟨10.1002/9781119818298.ch7⟩
Book sections
hal-03245419v1
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AI in Semiconductor IndustryArtificial Intelligence for Digitising Industry, River Publishers, pp.105-112, 2021, 9788770226646. ⟨10.13052/rp-9788770226639⟩
Book sections
hal-03421047v1
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Efficient Deep Learning Approach for Fault Detection in the Semiconductor IndustryOvidiu VERMESAN. Artificial Intelligence for Digitising Industry – Applications, River Publishers, pp.131-143, 2021, 978-87-7022-664-6
Book sections
hal-03782453v1
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Towards Agile Hardware Designs with Chisel: a Network Use-caseIEEE Design & Test, 2021, ⟨10.1109/MDAT.2021.3063339⟩
Journal articles
hal-03157426v1
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VP Float: First Class Treatment for Variable Precision Floating Point ArithmeticInternational Conference on Parallel Architectures and Compilation Techniques (PACT 2020), Oct 2020, Atlanta, United States. pp.355-356, ⟨10.1145/3410463.3414660⟩
Conference papers
hal-03108836v3
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(System)Verilog to Chisel Translation for Faster Hardware Design2020 31th International Symposium on Rapid System Prototyping (RSP), Sep 2020, VIrtual Conference, France
Conference papers
hal-02949112v1
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Low Power Tiny Binary Neural Network with improved accuracy in Human Recognition SystemsEuromicro Conference on Digital System Design (DSD 2020), Aug 2020, Kranj (virtual), Slovenia. pp.309-315, ⟨10.1109/DSD51259.2020.00057⟩
Conference papers
hal-03106955v1
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Accurate and Efficient Continuous Time and Discrete Events Simulation in SystemCDesign, Automation and Test in Europe (DATE 2020), Mar 2020, Grenoble, France
Conference papers
hal-02359109v1
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State of the art in hardware-accelerated neural networksApplied Machine Learning Days (AMLD 2020), Jan 2020, Lausanne, Switzerland
Conference papers
hal-03185600v1
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Coherence State Awareness in Way-Replacement Algorithms for Multicore ProcessorsAnais do XX Simpósio em Sistemas Computacionais de Alto Desempenho (WSCAD 2019), Nov 2019, Campo Grande, Brazil. pp.240-251
Conference papers
hal-02613791v1
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Gathering Memory Hierarchy Statistics in QEMUDesign and Verification Conference and Exhibition (DVCon 2019), Oct 2019, Munich, Germany. pp.1-8
Conference papers
hal-03106918v1
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Multi-Triggered Embedded Software Code Generation for Electrical Metering and Protection ApplicationsWorkshop on Rapid System Prototyping (RSP 2019), Oct 2019, New-York, United States
Conference papers
hal-02613776v1
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Teaching basic computer architecture, assembly language programming, and operating system design using RISC-VRISC V week 2019, Oct 2019, Paris, France
Conference papers
hal-02614532v1
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Electronic System Level Design of Heterogeneous Systems: a Motor Speed Control System Case StudyIEEE International New Circuits and Systems Conference (NEWCAS 2019), Jun 2019, Munich, Germany
Conference papers
hal-02107635v1
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Efficient Decompression of Binary Encoded Balanced Ternary SequencesIEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2019
Journal articles
hal-02103214v1
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Efficient Decompression of Binary Encoded Balanced Ternary Sequences (Early Access)IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2019, ⟨10.1109/TVLSI.2019.2906678⟩
Journal articles
hal-02108549v1
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Loop aware CFG matching strategy for accurate performance estimation in IR-level native simulationIntegration, the VLSI Journal, 2019
Journal articles
hal-01865119v1
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High-Efficiency Convolutional Ternary Neural Networks with Custom Adder Trees and Weight CompressionACM Transactions on Reconfigurable Technology and Systems (TRETS), 2018, Special Issue on Deep learning on FPGAs, 11 (3), pp.1-24. ⟨10.1145/3294768⟩
Journal articles
hal-01686718v2
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Message-Oriented Devices on FPGAsInternational Symposium on Rapid System Prototyping (RSP 2018), Oct 2018, Torino, Italy. pp.8-14
Conference papers
hal-02114435v1
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High-Throughput and High-Accuracy Classification with Convolutional Ternary Neural NetworksInternational Workshop on Highly Efficient Neural Processing (HENP'2018), Oct 2018, Torino, Italy
Conference papers
hal-01922342v1
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High-Throughput Ternary CNN on FPGA: Low Level Optimizations and Compression18th International Forum on MPSoC (MPSoC'2018), Jul 2018, Snowbird, UTAH, United States
Conference papers
hal-01922338v1
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Dynamic Coherent Cluster: A Scalable Sharing Set Management Approach29th International Conference on Application-Specific Systems, Architectures and Processors (ASAP'2018), Jul 2018, Milano, Italy. pp.1-8
Conference papers
hal-01908799v1
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Périphériques Orientés Message sur FPGAConférence d’informatique en Parallélisme, Architecture et Système (COMPAS 2018), Jul 2018, Toulouse, France. pp.1-9
Conference papers
hal-02132889v1
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Simulation rapide des systèmes multiprocesseursArchitecture, hier, aujourd'hui, demain", Colloque en l'honneur de Michel Auguin, Daniel Etiemble et Bernard Goossens, Jul 2018, Toulouse, France
Conference papers
hal-02132895v1
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Overview of the State of the Art in Embedded Machine LearningDesign, Automation & Test in Europe Conference & Exhibition (DATE'2018), Mar 2018, Dresden, Germany. pp.1-6
Conference papers
hal-01898681v1
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Effective System Level Simulation Techniques and Cross-Layer Perspectives on Low Power DesignDesign, Automation and Test in Europe (DATE'2018), Mar 2018, Dresden, Germany
Conference papers
hal-01922354v1
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A mapping approach between IR and binary CFGs dealing with aggressive compiler optimizations for performance estimation23rd Asia and South Pacific Design Automation Conference (ASPDAC'2018), Jan 2018, Jeju, North Korea. pp.452-457
Conference papers
hal-01908782v1
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IR-level annotation strategy dealing with aggressive loop optimizations for performance estimation in native simulation: work-in-progress12th IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (ACM/IFIP'2017), Oct 2017, Séoul, North Korea. pp.13:1-13:2
Conference papers
hal-01701141v1
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Scalable High-Performance Architecture for Convolutional Ternary Neural Networks on FPGAField Programmable Logic and Applications (FPL), 2017 27th International Conference on, Sep 2017, Gent, Belgium
Conference papers
hal-01563763v1
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A Distributed NUCA Architecture Using an Efficient NoC Multicasting SupportEuromicro Conference on Digital System Design (DSD 2017), Aug 2017, Vienne, Austria. pp.184-191, ⟨10.1109/DSD.2017.34⟩
Conference papers
hal-01701072v1
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Optimizing Memory Access Performance Using Hardware Assisted Virtualization in Retargetable Dynamic Binary TranslationEuromicro Conference on Digital System Design (DSD'2017), Aug 2017, Vienne, Austria. pp.40-46
Conference papers
hal-01701085v1
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A Meta-Routing Method to Create Multiple Virtual Logical Networks on a Single Hardware NoC2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Jul 2017, Bochum, Germany. pp.200-205, ⟨10.1109/ISVLSI.2017.43⟩
Conference papers
hal-01570786v1
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Trace-driven exploration of sharing set management strategies for cache coherence in manycores15th IEEE International New Circuits and Systems Conference (NEWCAS'17), Jun 2017, Strasbourg, France. pp.77-80
Conference papers
hal-01701046v1
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Efficient and versatile FPGA acceleration of support counting for stream mining of sequences and frequent itemsetsACM Transactions on Reconfigurable Technology and Systems (TRETS), 2017, ACM Transactions on Reconfigurable Technology and Systems (TRETS), 10 (3), pp.21. ⟨10.1145/3027485⟩
Journal articles
hal-01474234v1
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Ternary Neural Networks for Resource-Efficient AI ApplicationsInternational Joint Conference on Neural Networks, May 2017, Anchorage, United States
Conference papers
hal-01481478v1
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Ternary neural networks for resource-efficient AI applications2017 International Joint Conference on Neural Networks (IJCNN'17), May 2017, Anchorage, AK, United States. pp.2547-2554
Conference papers
hal-01570788v1
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A Method for Fast Evaluation of Sharing Set Management Strategies in Cache Coherence Protocols30th International Conference on Architecture of Computing Systems (ARCS 2017), Apr 2017, Vienna, Austria. pp.111-123
Conference papers
hal-01523232v1
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Modeling instruction cache and instruction buffer for performance estimation of VLIW architectures using native simulationDesign, Automation & Test in Europe Conference & Exhibition (DATE 2017), Mar 2017, Lausanne, Switzerland. pp.266-269
Conference papers
hal-01570789v1
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Loop aware IR-level annotation framework for performance estimation in native simulation22nd Asia and South Pacific Design Automation Conference (ASPDAC 2017), Jan 2017, Chiba, Japan. pp.220-225
Conference papers
hal-01522712v1
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Detecting Software Cache Coherence Violations in MPSoC Using Traces Captured on Virtual PlatformsACM Transactions on Embedded Computing Systems (TECS), 2017, 16 (2), pp.30:1-30:21. ⟨10.1145/2990193⟩
Journal articles
hal-01709225v1
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Multiprocessor System-on-Chip Prototyping Using Dynamic Binary TranslationHandbook of Hardware/Software Codesign, springer, pp.565-591, 2017, 978-94-017-7266-2. ⟨10.1007/978-94-017-7267-9⟩
Book sections
hal-02152482v1
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Dynamic Binary Translation of VLIW Codes on Scalar ArchitecturesIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2017, 36 (5), pp.789-800. ⟨10.1109/TCAD.2016.2604294⟩
Journal articles
hal-01570692v1
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A 4 x 4 x 2 Homogeneous Scalable 3D Network-on-Chip Circuit With 326 MFlit/s 0.66 pJ/b Robust and Fault Tolerant Asynchronous 3D LinksIEEE Journal of Solid-State Circuits, 2016, 52 (1), pp.33 - 49. ⟨10.1109/JSSC.2016.2611497⟩
Journal articles
hal-01447433v1
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Simulation driven insertion of data prefetching instructions for early software-on-SoC optimization2016 International Symposium on Rapid System Prototyping (RSP'16), Oct 2016, Pittsburgh, PA, United States. pp.93-99
Conference papers
hal-01570781v1
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On the analysis of virtual platform generated traces16th International Forum on MPSoC, Jul 2016, Nara, Japan
Conference papers
hal-01523247v1
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Facing ADAS validation complexity with usage oriented testingERTS 2016, Jan 2016, Toulouse, France. pp.13
Conference papers
hal-01277494v1
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Virtual prototyping of floating point unitsWorkshop on Rapid Simulation and Performance Evaluation - Methods and Tools (Rapido'16), Jan 2016, Prague, Czech Republic. pp.1-6
Conference papers
hal-01445031v1
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Simulation rapide et précise de systèmes manycoreEcole d'hiver Francophone sur les Technologies de Conception des Systèmes embarqués Hétérogènes, Jan 2016, Vilard de Lans, France
Conference papers
hal-01523885v1
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Deterministic reversible MPSoC debugger based on virtual platform execution tracesDesign Automation for Embedded Systems, 2016, 20 (1), pp.47-63. ⟨10.1007/s10617-015-9167-8⟩
Journal articles
hal-01332728v1
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Line coding methods for high speed serial linksInternational Symposium on Microelectronics (IMS'15), Oct 2015, Orlando, FL, United States. pp.318-323
Conference papers
hal-01413156v1
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A Few Open Problems in Vertically-Partially-Connected 3D-NoC15th International Forum on MPSoC for Software-defined Hardware, Jul 2015, Ventura Beach Marriott, CA, United States
Conference papers
hal-01413174v1
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Low overhead, DC-Balanced and run length limited Line CodingIEEE 19th Workshop on Signal and Power Integrity (SPI'15), May 2015, Berlin, Germany. pp.1-4
Conference papers
hal-01413161v1
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Fast and accurate branch predictor simulationDesign, Automation & Test in Europe Conference & Exhibition (DATE'15), Mar 2015, Grenoble, France. pp.317-320
Conference papers
hal-01413165v1
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Collecting traces in dynamic binary translation based virtual prototyping platformsWorkshop on Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO'15), Jan 2015, Amsterdam, Netherlands. pp.1-6
Conference papers
hal-01413166v1
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Simulation native basée sur le support matériel à la virtualisation cas des systèmes many-cœurs spécifiquesRevue des Sciences et Technologies de l'Information - Série TSI : Technique et Science Informatiques, 2015, 34 (1-2), pp.153-173. ⟨10.3166/tsi.34.153-173⟩
Journal articles
hal-01332717v1
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Device driver generation targeting multiple operating systems using a model-driven methodologyIEEE International Symposium on Rapid System Prototyping (RSP'14), Oct 2014, New Delhi, India. pp.30-36
Conference papers
hal-01408824v1
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Assignment of Vertical Links to Routers in Vertically-Partially-Connected 3D-NoCsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2014, 33 (8), pp.1208-1218. ⟨10.1109/TCAD.2014.2323219⟩
Journal articles
hal-01195897v1
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A Scalable Low Overhead Line Coding For Asynchronous High Speed Serial Transmission18th IEEE Workshop on Signal and Power Integrity (SPI'14), May 2014, Ghent, Belgium. pp.1-4, ⟨10.1109/SaPIW.2014.6844527⟩
Conference papers
hal-01077846v1
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Simulation native de systèmes many-cœurs pouvant avoir des caractéristiques architecturales non génériquesConférence d’informatique en Parallélisme (COMPAS'14), Architecture et Système, Apr 2014, Neuchâtel, Suisse
Conference papers
hal-01130760v1
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Some Design Issues for 3D NoCs : From Circuits to SystemsKeynote in 8th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC'14), Apr 2014, Darmstadt, Germany
Conference papers
hal-01131204v1
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Traces non intrusives : un outil d'analyse du logiciel et du matériel pour les MPSoCsEcole d'hiver Francophone sur les Technologies de Conception des Systèmes embarqués Hétérogènes (FETCH 2014), Jan 2014, Ottawa, Canada
Conference papers
hal-01060413v1
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Scalability bottlenecks discovery in MPSoC platforms using data mining on simulation tracesDesign, Automation & Test in Europe Conference & Exhibition (DATE), 2014, Dresden, Germany, Germany. pp.1-6
Conference papers
hal-01002685v1
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Automated generation of efficient instruction decoders for instruction set simulatorsConference on Computer Aided Design (ICCAD'13), Nov 2013, San Jose, CA, United States. pp.739-746, ⟨10.1109/ICCAD.2013.6691197⟩
Conference papers
hal-01059142v1
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A General Framework for Average-Case Performance Analysis of Shared ResourcesEuromicro Conference on Digital System Design (DSD'13), Sep 2013, Santander, Spain. pp.78-85, ⟨10.1109/DSD.2013.116⟩
Conference papers
hal-01058906v1
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An Iterative Computational Technique for Performance Evaluation of Networks-on-ChipIEEE Transactions on Computers, 2013, 62 (8), pp.1641-1655. ⟨10.1109/TC.2012.85⟩
Journal articles
hal-01138294v1
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Using Hardware Assisted Virtualization for Native Simulation of MPSoCEmbedded MPSoC and Multicore, Jul 2013, Otsu, Japan
Conference papers
hal-01059997v1
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Network-on-Chip Performance Evaluation Using an Analytical Method |