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Book Sections Year : 2006

Formal Evaluation of the Robustness of Dual-Rail Logic Against DPA Attacks

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Abstract

Based on a first order model of the switching current flowing in CMOS cell, an investigation of the robustness against DPA of dual-rail logic is carried out.

Dates and versions

lirmm-00109844 , version 1 (25-10-2006)

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Cite

Hanitriniaina Razafindraibe, Michel Robert, Philippe Maurine. Formal Evaluation of the Robustness of Dual-Rail Logic Against DPA Attacks. Nadine Azémard, Philippe Maurine, Johan Vounckx. Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 4148/2006, Springer Berlin / Heidelberg, pp.634-644, 2006, Lecture Notes in Computer Science, 978-3-540-39094-7. ⟨10.1007/11847083_44⟩. ⟨lirmm-00109844⟩
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