Conference Papers Year : 2009

MARTE based design flow for Partially Reconfigurable Systems-on-Chips

Abstract

Systems-on-Chip (SoCs) are considered an integral solution for designing embedded systems, for targeting complex intensive parallel computation applications. As advances in SoC technology permit integration of increasing number of hardware resources on a single chip, the targeted application domains such as software-defined radio are become increasingly sophisticated. The fallout of this complexity is that the system design, particularly software design, does not evolve at the same pace as that of hardware leading to a significant productivity gap. Adaptivity and reconfigurability are also critical issues for SoCs which must be able to cope with end user environment and requirements.
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Dates and versions

inria-00486846 , version 1 (27-05-2010)

Identifiers

  • HAL Id : inria-00486846 , version 1

Cite

Imran Rafiq Quadri, Alexis Muller, Samy Meftali, Jean-Luc Dekeyser. MARTE based design flow for Partially Reconfigurable Systems-on-Chips. 17th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC 09), Oct 2009, Florianapolis, Brazil. ⟨inria-00486846⟩
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