Communication Dans Un Congrès Année : 2026

Area Efficient Speculative Loop Pipelining for High-Level Synthesis

Résumé

High-Level Synthesis (HLS) allows the automatic generation of efficient circuit designs for computation-intensive kernels, but it lacks flexibility when dealing with irregular control flow. Dynamic and speculative HLS techniques are used to address this issue. These techniques outperform state-of-the-art HLS in kernel execution times but introduce a significant area overhead. In contrast, state-of-the-art HLS easily highlights and exploits resource-sharing opportunities. In this work, we show how to adapt an existing speculative HLS approach to take advantage of well-known static resource sharing mechanisms. Our results show a decrease of the area cost by 34% on average.

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Dates et versions

hal-05365717 , version 1 (14-11-2025)
hal-05365717 , version 2 (08-12-2025)

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  • HAL Id : hal-05365717 , version 2

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Dylan Leothaud, Simon Rokicki, Steven Derrien, Isabelle Puaut. Area Efficient Speculative Loop Pipelining for High-Level Synthesis. DATE 2026 - Design, Automation and Test in Europe Conference, Apr 2026, Verona, Italy. ⟨hal-05365717v2⟩
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