Research towards efficient and environmentally friendly thermoelectrics proposes silicon nanostructures as possible candidates through reduction of the phononic thermal conductivity. However, there is scarce literature about experimental measurements of the thermoelectric figure-of-merit zT on actual crystalline silicon devices. This article reports on the fabrication and full thermoelectric characterization of crystalline 60 nm thick membranes. To that end, an experiment with four types of built-in devices was designed using a silicon-on-insulator substrate to extract the Seebeck coefficient, electrical conductivity and thermal conductivity. The results show indeed a reduced thermal conductivity of 31 W m$^{−1}$ K$^{−1}$ for a 60 nm thick Si membrane and $κ$ = 18 W m$^{−1}$ K$^{−1}$ for a porous Si membrane. This reflects an 88% reduction in thermal conductivity compared to the bulk Si material and a 42% reduction compared to plain Si membranes. In terms of power generation, the power factor of the fabricated devices surpasses that of state-of-the-art silicon thin films at room temperature. Notably, a zT figure of merit of 0.04 is reported for a 60 nm thick phonon-engineered Si membrane, which is considerably higher than that of bulk Si(0.001) but lower than previously reported results on other types of nano-objects.