A new era of space exploration is emerging, characterized by a rapid surge in satellites and significant cost reductions. Memory circuits play a vital role in space applications, and it is essential to develop techniques to address the radiation-induced upsets in these circuits. This work extends a previously presented method to detect Multiple-Cell Upsets (MCU) in SRAMs for space applications. The method involves spatially interleaving an SRAM array with a network of radiation detectors. Considering the relationship between the radiation-hardening level and the area penalty added by the detection cells, a tool for automatically generating the SRAM layout with different configurations was developed and is presented in this work. The developed tool facilitates using the new method in commercial applications, providing different levels of protection according to the environment in which the circuit will be exposed.