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Article Dans Une Revue IEEE Access Année : 2023

Design, Simulation and Optimization of an Enhanced Vertical GaN Nanowire Transistor on Silicon Substrate for Power Electronic Applications

Résumé

A new vertical transistor structure based on GaN nanowire is designed and optimized using the TCAD-Santaurus tool with an electrothermal model. The studied structure with quasi-1D drift region is adapted to GaN nanowires synthesized with the bottom-up approach on a highly n-doped silicon substrate. The electrical performance is studied as a function of various epi-structure parameters, including region lengths and doping levels, nanowire diameter, and the impact of the surface states. The results reveal that the optimized structure has a Normally-OFF mode with a threshold voltage higher than 0.8 V and exhibits minimized leakage current, low on-state resistance, and maximized breakdown voltage. To the best of our knowledge, this is the first exhaustive study of GaN-based nanowire transistors, providing valuable insights for the scientific community and contributing to a deeper understanding of the impact of GaN nanowire parameters on device performance. INDEX TERMS Normally-off, vertical transistor, GaN, nanowire, gate-all-around, sentaurus TCAD, breakdown voltage, on-state resistance, surface states, threshold voltage.
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hal-04300060 , version 1 (22-11-2023)

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Mohammed Benjelloun, Zahraa Zaidan, Ali Soltani, Noëlle Gogneau, Denis Morris, et al.. Design, Simulation and Optimization of an Enhanced Vertical GaN Nanowire Transistor on Silicon Substrate for Power Electronic Applications. IEEE Access, 2023, 11, pp.40249 - 40257. ⟨10.1109/access.2023.3248630⟩. ⟨hal-04300060⟩
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