Optimizing Variational Circuits for Higher-Order Binary Optimization - Archive ouverte HAL
Conference Papers Year : 2023

Optimizing Variational Circuits for Higher-Order Binary Optimization

Abstract

Variational quantum algorithms have been advocated as promising candidates to solve combinatorial optimization problems on near-term quantum computers. Their methodology involves transforming the optimization problem into a quadratic unconstrained binary optimization (QUBO) problem. While this transformation offers flexibility and a ready-to-implement circuit involving only two-qubit gates, it has been shown to be less than optimal in the number of employed qubits and circuit depth, especially for polynomial optimization. On the other hand, strategies based on higher-order binary optimization (HOBO) could save qubits, but they would introduce additional circuit layers, given the presence of higher-than-two-qubit gates. In this paper, we study HOBO problems and propose new approaches to encode their Hamiltonian into a ready-to-implement circuit involving only two-qubit gates. Our methodology relies on formulating the circuit design as a combinatorial optimization problem, in which we seek to minimize circuit depth. We also propose handy simplifications and heuristics that can solve the circuit design problem in polynomial time. We evaluate our approaches by comparing them with the state of the art, showcasing clear gains in terms of circuit depth.

Dates and versions

hal-04174561 , version 1 (01-08-2023)

Identifiers

Cite

Zoé Verchère, Sourour Elloumi, Andrea Simonetto. Optimizing Variational Circuits for Higher-Order Binary Optimization. IEEE International Conference on Quantum Computing and Engineering (QCE), Sep 2023, Seattle (WA), United States. ⟨hal-04174561⟩
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