Towards Low-Power and Low Data-Rate Software-Defined Radio Baseband with RISC-V Processor for Flexibility and Security
Résumé
This work discusses opportunities and challenges of using Software Defined Radio (SDR) in baseband processor architectures dedicated to IoT end-devices. In that context, it demonstrates a novel architecture for flexible, secure and low-power network-based RISC-V processor. It is based on a multi-layer data tracing approach (network, execution and hardware) to detect ongoing logical attacks using the network as an entry point.
Domaines
Informatique [cs]
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4th-RISC-V-Meeting-2022-05-03-Mohamed-ElBouazzati-poster.pdf (442.81 Ko)
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4th-RISC-V-Meeting-2022-05-03-Mohamed-ElBouazzati-poster-abstract.pdf (256.71 Ko)
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| Origine | Fichiers produits par l'(les) auteur(s) |
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| Origine | Fichiers produits par l'(les) auteur(s) |
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