Semianalytical model for high speed analysis of all-digital PLL clock-generating networks - Archive ouverte HAL
Communication Dans Un Congrès Année : 2017

Semianalytical model for high speed analysis of all-digital PLL clock-generating networks

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hal-04031095 , version 1 (15-03-2023)

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Eugene Koskin, Dimitri Galayko, Orla Feely, Elena Blokhina. Semianalytical model for high speed analysis of all-digital PLL clock-generating networks. 2017 IEEE International Symposium on Circuits and Systems (ISCAS), May 2017, Baltimore, United States. pp.1-4, ⟨10.1109/ISCAS.2017.8050582⟩. ⟨hal-04031095⟩
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