This article describes the development of a test bench so as to measure the ageing of 16 nm FinFETs used in a Zynq UltraScale+ FPGA from Xilinx. The Ring Oscillator (RO) drift measurement method was chosen and implemented in the setup. However, RO is a circuit sensitive not only to ageing but also to temperature and voltage. In order to mitigate the undesired sensitivity to temperature and voltage, we installed a regulation system to control the temperature and the internal voltage of the FPGA, and we characterised the RO frequency in function of the temperature and the voltage to apply post-measurement compensations. We improved the measurement circuit by using the GPS signal as a time reference. 1000 h test with (T$_{FPGA}$ = 100°C) and (V$_{FPGA}$ = V$_{nom}$ + 25%) was performed and results show clear RO frequency drifts lower than 0.1 % measured with an accuracy of 0.9 × 10−4.