PLANAR-TYPE TRIAC WITH POROUS SILICON-BASED EDGE STRUCTURE - Archive ouverte HAL
Communication Dans Un Congrès Année : 2022

PLANAR-TYPE TRIAC WITH POROUS SILICON-BASED EDGE STRUCTURE

Résumé

We investigate an innovative periphery made of porous silicon (PS) for planar type AC switch, i.e. TRIAC. This device is a bidirectional current controlled switch for load control. We are therefore interested in the use of the PS to improve voltage blocking capacity and to limit leakage currents. PS is formed by electrochemical etching in the periphery of the TRIAC p-type (Piso). The incorporation of PS, by its dielectric properties, reduces the size of the periphery of TRIAC. The porosity of PS impacts blocking capacities and it is possible to see it with the electrical characteristics detailed in the following. Low leakage currents (< 10 µA) have been demonstrated until 510 volts in reverse. The blocking voltage and leakage currents values are influenced slightly by porosity. This work confirms the benefits of PS as a potential insulating material for the manufacture of the peripheries of TRIAC devices.
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Dates et versions

hal-03980838 , version 1 (09-02-2023)

Identifiants

  • HAL Id : hal-03980838 , version 1

Citer

Sylvain Audière, Thomas Defforge, Benjamin Morillon, Emmanuel Collard, Jérôme Billoue, et al.. PLANAR-TYPE TRIAC WITH POROUS SILICON-BASED EDGE STRUCTURE. Porous Semiconductors - Science and Technology, Mar 2022, Lido Di Camaiore, Italy. ⟨hal-03980838⟩
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