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Conference Papers Year : 2023

Securing a RISC-V architecture: A dynamic approach

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Abstract

The SecureV (also known as SecV) project offers an innovative, open-source hardware, secure, and high-performance processor core based on the RISC-V ISA. The originality of the approach lies in the integration of a complete solution to increase security based on dynamic code transformation, covering 4 of the 5 NIST1 functions of cybersecurity via monitoring (identify, detect), obfuscation (protect), and dynamic adaptation (react).
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Dates and versions

hal-03906564 , version 1 (19-12-2022)

Identifiers

  • HAL Id : hal-03906564 , version 1

Cite

Sébastien Pillement, Maria Mendez Real, Pottier Juliette, Nieddu T., Sébastien Faucou, et al.. Securing a RISC-V architecture: A dynamic approach. DATE Conference 2023, Apr 2023, Antwerp, Belgium. ⟨hal-03906564⟩
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