Introducing 2-nm/20Å Nano-Sheet FET technology with Buried Power Rails and nano Through-Silicon-Vias in Microwind
Résumé
This paper describes the implementation of the novel Nano-sheet FET (NS-FET) for the 2nm/20Å technology node in Microwind. After a general presentation of the electronic market and the roadmap to the atomic scale, we present design rules and basic metrics for the 2-nm node. Concepts related to the design of NS-FET using novel buried power rails are also described. Lastly, we analyze the performance of a ring oscillator, basic cells, sequential cells, and a 6-transistor RAM memory.
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